AI hardware startup Axelera AI has unveiled its Titania AI inference chiplet.
The company announced the hardware following a €61.6 million ($66.9m) grant from the EuroHPC Joint Undertaking’s (EuroHPC JU) newly established Digital Autonomy with RISC-V for Europe (DARE) Project to support its development.
The funding brings the total raised by the Eindhoven, Netherlands-based startup since 2022 to $200 million. The company said it will be used to further its development efforts and grow its R&D teams in the Netherlands, Italy, and Belgium.
In a statement, Axelera AI said the development of Titania builds on the company’s approach to Digital In-Memory Computing (D-IMC) architecture by combining it with RISC-V capabilities for hardware that meets “the increasing AI demands across various market sectors, including HPC, enterprise data centers, robotics, automotive.”
The company added that “D-IMC allows for near-linear scalability in performance without the significant power and cooling overhead typical of other solutions.” Multiple Titania chiplets will be packaged in a System-in-Package (SiP).
“Our D-IMC technology leverages a future-proof, scalable multi-AI-core architecture, ensuring unparalleled adaptability and efficiency. Enhanced with proprietary RISC-V vector extensions, this versatile mixed-precision platform is engineered to excel across diverse AI workloads,” explained Evangelos Eleftheriou, former IBM fellow and now CTO and co-founder of Axelera AI. “Uniquely, our architecture facilitates scaling from the Edge to the cloud, streamlining expansion and optimizing performance in ways that traditional cloud-to-edge approaches cannot. We are setting a new standard for AI infrastructure, making true scalability a tangible reality.”
The funding announcement coincides with the launch of DARE, a project established by the EuroHPC JU to support the development of “cutting-edge HPC hardware and software based on RISC-V, an open instruction set architecture poised to power exascale and post-exascale supercomputers.”
EuroHPC JU said the project will start by designing and developing one processor and two accelerators based on the RISC-V architecture, including a vector accelerator for high-precision HPC, an AI processing unit for AI inference, and a general-purpose processor for HPC workloads in European supercomputers.
Commenting on the launch of DARE, Anders Jensen, EuroHPC JU executive director, said: “I am proud to announce the launch of the DARE project, which marks a significant milestone for European digital sovereignty. This ambitious initiative will drive innovation in both hardware and software technologies and leverage the full power of HPC and AI to develop secure, efficient, and European-led solutions for the future.”
The DARE consortium includes 38 partners from 13 countries and is coordinated by the Barcelona Supercomputing Center (BSC).
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